cystech electronics corp. spec. no. : c733n6 issued date : 2013.08.12 revised date : 2013.09.06 page no. : 1/8 MTP5614N6 cystek product specification p-channel enhancement mode mosfet MTP5614N6 description the MTP5614N6 is a p-channel enhancement-mode mo sfet, providing the designer with the best combination of fast switching, ruggedized device de sign, low on-resistance and cost effectiveness. the sot-26 package is universally preferred for a ll commercial-industrial surface mount applications. features equivalent circuit ? simple drive requirement MTP5614N6 ? low on-resistance ? small package outline g gate s source d drain bv dss -60v i d -3.5a r dson @v gs =-10v, i d =-3a 72m (typ.) r dson @v gs =-4.5v, i d =-2.7a 98m (typ.) ? pb-free lead plating package absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds -60 gate-source voltage v gs 20 v continuous drain current @v gs =-10v, t a =25 c (note 1) i d -3.5 continuous drain current @v gs =-10v, t a =100 c (note 1) i d -2.2 pulsed drain current (note 2, 3) i dm -20 a pd 1.6 w total power dissipation @ t a =25 c linear derating factor 0.013 w / c operating junction and storage temp erature range tj ; tstg -55~+150 c thermal resistance, junction-to-ambient (note 1) rth,ja 78 c/w note : 1.surface mounted on 1 in2 copper pad of fr-4 board. 156 /w when mounted on minimum copper pad. 2.pulse width lim ited by maximum junc tion temperature. 3.pulse width 300 s, duty cycle 2%
cystech electronics corp. spec. no. : c733n6 issued date : 2013.08.12 revised date : 2013.09.06 page no. : 2/8 MTP5614N6 cystek product specification electrical characteristics (tj=25 c, unless otherwise noted) symbol min. typ. max. unit test conditions static bv dss -60 - - v v gs =0v, i d =-250 a bv dss / tj - 0.4 - v/ reference to 25 , i d =250 a v gs(th) -1 -1.8 -2.5 v v ds =v gs , i d =-250 a i gss - - 100 na v gs =20v, v ds =0v - - 1 v ds =-48v, v gs =0v i dss - - 25 a v ds =-48v, v gs =0v, tj=70 - 72 95 v gs =-10v, i d =-3a *r ds(on) - 98 130 m v gs =-4.5v, i d =-2.7a *g fs - 5.8 - s v ds =-5v, i d =-3a dynamic ciss - 929 - coss - 48 - crss - 33 - pf v ds =-30v, v gs =0v, f=1mhz t d(on) - 10 - t r - 22 - t d(off) - 27 - t f - 14 - ns v ds =-30v, i d =-1a, v gs =-10v, r g =6 ? qg - 14 - qgs - 3 - qgd - 3.4 - nc v ds =-30v, i d =-3.5a, v gs =-10v *pulse test : pulse width 300 s, duty cycle 2% source drain diode symbol min. typ. max. unit test conditions *i s - - -3.5 *i sm - - -20 a *v sd - -0.78 -1.2 v i s =-2a,v gs =0v *t rr - 12 - ns q rr - 7 - nc i s =-2a,v gs =0v, di/dt=100a/ s *pulse test : pulse width 300 s, duty cycle 2% ordering information device package shipping MTP5614N6-0-t1-g sot-26 (pb-free lead plating an d halogen-free package) 3000 pcs / tape & reel
cystech electronics corp. spec. no. : c733n6 issued date : 2013.08.12 revised date : 2013.09.06 page no. : 3/8 MTP5614N6 cystek product specification typical characteristics typical output characteristics 0 5 10 15 20 012345 -v ds , drain-source voltage(v) -i d , drain current (a) -v gs =2.5v -v gs =3 v -v gs =3.5v -v gs =4v 10v 9v 8v 7v 6v 4.5 v brekdown voltage vs ambient temperature 0.4 0.6 0.8 1 1.2 1.4 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , normalized drain-source breakdown voltage i d =-250 a, v gs =0v static drain-source on-state resistance vs drain current 10 100 1000 0.01 0.1 1 10 -i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) v gs =-10v v gs =-3v v gs =-3.5v v gs =-4.5v v gs =-4v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 024681 -i dr , reverse drain current (a) -v sd , source-drain voltage(v) 0 tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 0 20 40 60 80 100 120 140 160 180 200 024681 0 drain-source on-state resistance vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds( on) , normalized static drain- source on-state resistance v gs =-4.5v, i d =-2.7a v gs =-10v, i d =-3a -v gs , gate-source voltage(v) r ds( on) , static drain-source on- state resistance(m) i d =-3a i d =-2.7a
cystech electronics corp. spec. no. : c733n6 issued date : 2013.08.12 revised date : 2013.09.06 page no. : 4/8 MTP5614N6 cystek product specification typical characteristics (cont.) capacitance vs drain-to-source voltage 10 100 1000 10000 0.1 1 10 100 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.4 0.6 0.8 1 1.2 1.4 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) -v gs( th) , normalized threshold voltage i d =-250 a forward transfer admittance vs drain current 0.01 0.1 1 10 0.001 0.01 0.1 1 10 -i d , drain current(a) g fs , forward transfer admittance-(s) v ds =-10v pulsed ta=25c gate charge characteristics 0 2 4 6 8 10 0 2 4 6 8 10121416 qg, total gate charge(nc) -v gs , gate-source voltage(v) i d =-3.5a v ds =-48v v ds =-30v v ds =-15v maximum safe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 -v ds , drain-source voltage(v) -i d , drain current (a) dc 10ms 100ms 1ms 100 s t a =25c, tj=150c r ja =78c/w, v gs =-10v single pulse 1s r ds( on) limit maximum drain current vs junctiontemperature 0 0.5 1 1.5 2 2.5 3 3.5 4 25 50 75 100 125 150 175 tj, junction temperature(c) i d , maximum drain current(a) t a =25c, v gs =-10v, r ja =78c/w
cystech electronics corp. spec. no. : c733n6 issued date : 2013.08.12 revised date : 2013.09.06 page no. : 5/8 MTP5614N6 cystek product specification typical characteristics (cont.) transient thermal response curves 0.001 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 1.e+03 t 1 , square wave pulse duration(s) r(t), normalized effectivetransient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t a =p dm *r ja (t) 4.r ja =78 c/w recommended soldering footprint
cystech electronics corp. spec. no. : c733n6 issued date : 2013.08.12 revised date : 2013.09.06 page no. : 6/8 MTP5614N6 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c733n6 issued date : 2013.08.12 revised date : 2013.09.06 page no. : 7/8 MTP5614N6 cystek product specification recommended wave soldering condition soldering time product peak temperature pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c733n6 issued date : 2013.08.12 revised date : 2013.09.06 page no. : 8/8 MTP5614N6 cystek product specification sot-26 dimension millimeters inches millimeters inches dim min. max. min. max. marking: dim min. max. min. max. a 1.050 1.250 0.041 0.049 e 1.500 1.700 0.059 0.067 a1 0.000 0.100 0.000 0.004 e1 2.650 2.950 0.104 0.116 a2 1.050 1.150 0.041 0.045 e 0.950 (bsc) 0.037 (bsc) b 0.300 0.500 0.012 0.020 e1 1.800 2.000 0.071 0.079 c 0.100 0.200 0.004 0.008 l 0.300 0.600 0.012 0.024 d 2.820 3.020 0.111 0.119 0 8 0 8 notes : 1.controlling dimension : millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material : ? lead : pure tin plated. ? mold compound : epoxy resin family, flammability solid burning class:ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance . 6-lead sot-26 plastic surface mounted package cystek package code: n6 style: pin 1. drain (d) pin 2. drain (d) pin 3. gate (g) pin 4. source (s) pin 5. drain (d) pin 6. drain ( d ) 5614 device name date code ? ?
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